Texas Instruments OMAP5912 Reference Manual page 969

Shared Peripherals
Table 1. MPU/DSP Peripheral Access (Continued)
MPU Domain
Module MPU Start
Name
GP FFFB
timer 8 D400
LCDCONV FFFE 3000
LCD FFFE
controller C000
LPG1 FFFB
D000
LPG2 FFFB
D800
McBSP1
McBSP2 FFFB 1000
McBSP3
MCSI1
MCSI2
Memory FFFB 8000
Stick
MMC/SDIO FFFB 7800
1
MMC/SDIO FFFB
2 7C00
Compact FFFE 2800
flash
controller
NAND flash FFFB
controller CC00
Note: The SSI and the GDD modules are on the L3-OCP2 port and thus are seen as part of memory port interface.
18 Peripheral Interconnects
MPU End MPU TIPB
Bus Type
FFFB D7FF Shared
FFFE 37FF Private
FFFE C0FF Private
FFFB D3FF Shared
FFFB BFFF Shared
FFFB 13FF Shared
FFFB 83FF Shared
FFFB 7BFF Shared
FFFB 7FFF Shared
FFFE 2FFF Private
FFFB Shared
CFFF
DSP Domain
L4 Controler DSP Start
Switch
Semi-static E101 D400
E101 1800
Semi-static E101 1000
E101 7000
E101 2800
E101 2000
Semi-static E101 7C00
DSP End DSP TIPB
Bus Type
E101 Shared
D7FF
E101 Shared
1BFF
E101 Shared
13FF
E101 Shared
73FF
E101 Shared
2BFF
E101 Shared
23FF
E101 Shared
7FFF
SPRU758A