Texas Instruments OMAP5912 Reference Manual page 945

Multimedia processor device overview and architecture
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4.1.8
Level-Sensitive Interrupts
SPRU757B
3) If the IRQ (interrupt from DSP interrupt handler to the DSP) is not active,
the DSP interrupt handler sends the highest priority interrupt (interrupt in
N_IRQ register) to the DSP as an IRQ signal. Then the DSP_SIR_IRQ
register is updated with contents of the N_IRQ register (the
DSP_SIR_IRQ contains encoded information that conveys the interrupt
line number of the IRQ).
4) The DSP recognizes the interrupt and jumps to the interrupt service
routine (ISR) code.
5) Within the ISR code, the DSP reads the DSP_SIR_IRQ in the DSP
interrupt handler to determine which interrupt line caused the interrupt.
The DSP executes specific code appropriately.
6) When the DSP reads the DSP_SIR_IRQ, the corresponding bit is reset in
the DSP_ITR of the DSP interrupt handler module. The IRQ is still active.
7) The DSP writes a 1 to new IRQ agreement bit (NEW_IRQ_AGR) in the
DSP_CONTROL_REG when it is about to exit the ISR routine to deassert
the IRQ going to the DSP and to enable a new IRQ generation.
8) The DSP exits the ISR and continues its normal code execution.
9) When the NEW_IRQ_AGR bit is written, the process jumps to Step 2.
1) The DSP interrupt handler module receives one or more incoming
interrupts from outside OMAP. Level-sensitive interrupts are not
registered, but are used in the logic as is. The DSP interrupt handler
assumes that the peripheral will not deassert the level-sensitive incoming
interrupts until it is told to do so by the DSP.
2) The DSP interrupt handler determines the highest priority interrupt and
puts it in the N_IRQ register.
3) If the IRQ (interrupt from DSP interrupt handler to the DSP) is not active,
the DSP interrupt handler sends the highest priority interrupt (interrupt in
N_IRQ register) to the DSP as IRQ signal. Then the DSP_SIR_IRQ is
updated with contents of N_IRQ register (the DSP_SIR_IRQ register
contains encoded information that conveys the interrupt line number of
IRQ).
4) The DSP recognizes the interrupt and jumps to the ISR code.
5) Within the ISR code, the DSP reads the DSP_SIR_IRQ in the DSP
interrupt handler to determine which interrupt line caused the interrupt.
Interrupt Handler Software
Interrupts
47

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