Texas Instruments OMAP5912 Reference Manual page 178

Traffic Controller
Table 54. OCP Registers
Name
OCPI_AFR
OCPI_MCFR
OCPI_ATYPER
OCPI_PR
OCPI_SMR
The reset value of the OCP protection register is all ones, such that all buses are protected on reset.
Note:
Table 55. OCPI Address Fault Register (OCPI_AFR)
Bit Name
31:0 Address
Table 56. OCPI Master Command Fault Register (OCPI_MCFR)
Bit Name
31:3 Reserved
2:0 MCMD
Table 57. Master Command Register Supported Commands
120 OMAP3.2 Subsystem
Base Address = 0xFFFE C320
Register Description
OCP address fault
OCP master command fault
OCP type of abort
OCP protection
OCP-I secure mode. See note.
Base Address = 0xFFFE C320, Offset = 0x00
Function
Address accessed by the master that causes an
abort or error.
Base Address = 0xFFFE C320, Offset = 0x04
Function
Reserved. Must be 0.
Command that caused an abort or error.
Table 57 lists tThe supported commands.
MCmd
000
001
010
011
OTHER
For non-supported Mcmd encoding, OCPI translates it to IDLE.
The READEX command is for atomic transfer: Read-modify-write. This
command is internally decoded to generate a lock signal for the OMAP3 traffic
Transaction Type
Idle
Write
Read
ReadEX
Not supported/not interpreted
R/W Offset
R 0x00
R 0x04
R/W 0x0C
R/W 0x14
R/W 0x18
R/W Reset
R 0
R/W Reset
R 0
R 0
SPRU749A