Texas Instruments OMAP5912 Reference Manual page 734

System DMA
Table 76. DMA LCD Channel Control Register (DMA_LCD_CCR)
Bit Name
15:14 SRC_AMODE_B2
13:12 SRC_AMODE_B1
11 end_prog
110 Direct Memory Access (DMA) Support
Start_Address must be aligned on the boundary of the type of data moved. For
example, if data_type is s32 the source start address must be aligned on a
word32. If data_type is s8, source start_address can have any value.
It is the software's responsibility to make sure that start address is aligned with
channel data_type.
PACK_EN_B1/PACK_EN_B2: packing enable for block_1/block_2
-
transfer
The DMA ports can have a data bus width different from the type of data
moved by the DMA channel. For example, s8 data_type can be read on a
32-bit DMA port. The DMA channel has the capacity to pack four
consecutive s8 data reads in a single 32-bit read access in order to
increase transfer bandwidth.
Pack_en_b1/Pack_en_b2 = 1: The source port makes packed accesses.
Pack_en_b1/Pack_en_b2 = 0: The source port never makes packed ac-
cesses.
BURST_EN_B1 / BURST_EN_B2: burst enable for block_1 / block_2
-
transfer
Used to enable bursting on the source port. When bursting is enabled, the
source port performs bursts 4 x src_width access. When bursting is dis-
abled, the source port performs single accesses of src_width access.
SRC_BURST_EN[1:0]
00
01
10
11
If the source port of the channel has no burst access capability, this field is
ignored.
Base Address = 0xFFFE E300, Offset Address =0xC2
Function
Source addressing mode for block 2. (Tie off: 01)
Source addressing mode for block 2. (Tie off 01)
End of programming status bit. (Tie off = 0)
Burst Type
Single access
Reserved
Burst 4x port_width (Support 4x32bit accesses)
Reserved
R/W Reset
R/W 00
R/W 00
R/W 00
rst
SPRU755B