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Figure 22.
Mode 5 Synchronous Burst 8x16-Bit Read Operation on 16-Bit Width Device
(RDWST=3, FCLKDIV =0, ADVHOLD=0, RDMODE=5). Data write-back on the bus after
read completion.
TC_CLK
FLASH.CLK
FLASH.CSx
FLASH.ADV
FLASH.A(25:1)
FLASH.D(15:0)
FLASH.OE
FLASH_DIR_O
FLASH.BE(1:0)
FLASH.RDY
SPRU749A
N cycles
D0
D1
Valid address
D2
D3
D4
00
Trdy
OMAP3.2 Subsystem
Traffic Controller
Î Î Î
D5
D6
D7
D7
Î Î Î
57
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