Analog Devices ADSP-SC58 Series Hardware Reference Manual page 1344

MSI Programming Model
Table 26-12: Command Register Settings for Single-Block or Multiple-Block Read (Continued)
Parameter
check_response_crc
Single-Block or Multiple-Block Write
Use the following procedure to perform a single-block or multiple-block write.
1. Write the data size in bytes in the
2. Write the block size in bytes in the
ADDITIONAL INFORMATION: The MSI sends data in blocks of size BLKSIZ each.
3. Program
MSI_CMDARG
4. Write data in the FIFO; it is best to start filling data the full depth of the FIFO.
5. Program the
MSI_CMD
Multiple-Block Read table.
ADDITIONAL INFORMATION: For SD and MMC cards, use CMD24 for a single-block write and CMD25
for a multiple-block write. For SDIO cards, use CMD53 for both single-block and multiple-block transfers.
After writing to the
bus, a CMDONE interrupt is generated.
6. Software looks for data error interrupts in the MSI_ISTAT.DCRC, MSI_ISTAT.DRTO, and
MSI_ISTAT.EBE bits. If necessary, software can terminate the data transfer by sending the STOP command.
7. Software looks for a transmit FIFO data request or timeout conditions from data starvation by the host. In
both cases, the software or the DMA writes data into the FIFO.
8. When a DTO interrupt is received, the data command is over. For an open-ended block transfer, if the byte
count is 0, the software must send the STOP command. If the byte count is not 0, then on completion of a
transfer of a given number of bytes, the MSI sends the STOP command, if necessary. The MSI_ISTAT.ACD
bit reflects the completion of the AUTO-STOP command. A response to AUTO_STOP is stored in the
MSI_RESP1 register.
9. Wait for the busy clear interrupt.
The card can drive the busy clear interrupt on the DAT line; the host controller generates the interrupt after the
busy is completed.
26–38
Value Comment
1 0 = MSI does not check response CRC
1 = MSI checks response CRC
MSI_BYTCNT
MSI_BLKSIZ
register with the data address to which data is written.
register with the parameters listed the Command Register Settings for Single-Block or
MSI_CMD register, the MSI starts executing a command; when the command is sent to the
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
register.
register.