Texas Instruments OMAP5912 Reference Manual page 1130

Multimedia processor device overview and architecture
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Figure 23.
Synchronization of Two I
2.6.3
Prescaler (SCLK/ICLK)
Figure 24.
Synchronization of Two I
0x0:
0x1:
0xFF:
Values after reset are low (All 8 bits).
2.6.4
Noise Filter
2
2.6.5
I
C Interrupts
SPRU760B
2
C Clock Generators
SCL from
device1
SCL from
device2
Bus line
SCL
2
The I
C module is operated with an internal approximately 12-MHz clock
(ICLK). This clock is generated via the I
consists of an 8-bit register. I
clock (SCLK) to obtain an approximately 12-MHz clock for the I
2
C Clock Generators
PCLK
Divide by 1
Divide by 2
Divide by 256
The noise filter suppresses any noise that is 50 ns or less. It is designed to
suppress noise with 1 ICLK, assuming the lower and upper limits of ICLK are
8 MHz and 16 MHz, respectively.
2
The I
C module generates six types of interrupts: Arbitration-lost,
no-acknowledge, general call, registers-ready-for-access, receive, and
transmit. These six interrupts are accompanied by six interrupt masks and
flags defined in the I2C_IE and I2C_STAT registers, respectively.
Arbitration lost interrupt (AL): Generated when the I
-
procedure is lost.
2
C prescaler block. The prescaler
2
C _PSC is used for dividing down the system
1
ICLK
(PSC+1)
I2C Multimaster Peripheral
Wait
Start high
state
period
2
C module.
2
C arbitration
Serial Interfaces
65

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