Texas Instruments OMAP5912 Reference Manual page 1126

Multimedia processor device overview and architecture
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2
Figure 20.
I
C Data Transfer
SDA
MSB
SCL
1
Start
condition (S)
SPRU760B
Acknowledgement
signal from receiver
2
7
8
2
The I
C module supports two data formats, as shown in Figure 21:
7-bit/10-bit addressing format
-
7-bit/10-bit addressing format with repeated start condition
-
The first byte after a start condition (S) always consists of 8 bits. In the
acknowledge mode, an extra bit dedicated for acknowledgement is inserted
after each byte.
In the addressing formats with 7-bit addresses, the first byte is composed of
7 MSB slave-address bits and 1 LSB R/W_ bit. In the addressing formats with
10-bit addresses, the first byte has 7 MSB slave address bits, such as 11110XX
where XX is the two MSB of the 10-bit addresses and 1 LSB R/W_ bit, which
is 0 in this case.
The least-significant R/W_ of the address byte indicates the direction of the
transmission of the following data bytes. If R/W_ is 0, the master writes data
into the selected slave; if it is 1, the master reads data out of the slave.
Acknowledgement
signal from receiver
9
1
2
ACK
I2C Multimaster Peripheral
8
9
ACK
Start
condition (S)
Serial Interfaces
61

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