9 SERIAL PORTS
The ADSP-2126x processors have up to six independent, synchronous
serial ports (SPORTs) that provide an I/O interface to a wide variety of
peripheral devices. Each serial port has its own set of control registers and
data buffers. With a range of clock and frame synchronization options, the
SPORTs allow a variety of serial communication protocols and provide a
glueless hardware interface to many industry-standard data converters and
codecs.
The number of serial ports varies depending on the specific proces-
sor model you are using. This chapter was written using six serial
ports for examples. Programs need to be written accordingly.
Serial ports can operate at one-quarter the full clock rate of the processor,
at a maximum clock rate of n/4M bit/s, where n equals the processor
core-clock frequency (
has 100M bit/s maximum throughput. Bidirectional (transmit or receive)
functions provide greater flexibility for serial communications. Serial port
data can be automatically transferred to and from on-chip memory using
DMA block transfers. In addition to standard synchronous serial mode,
each serial port offers a Time Division Multiplexed (TDM) multichannel
mode, Left-justified Sample Pair mode, and I
Serial ports offer the following features and capabilities:
• Two bidirectional channels (A and B) per serial port, configurable
as either transmitters or receivers. Each serial port can also be con-
figured as two receivers or two transmitters, permitting two
unidirectional streams into or out of the same serial port. This
ADSP-2126x SHARC Processor Hardware Reference
). If channels A and B are active, each SPORT
CCLK
2
S mode.
9-1
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