Processing Elements - Analog Devices ADSP-21261 SHARC Hardware Reference Manual

2 PROCESSING ELEMENTS

The DSP's processing elements (PEx and PEy) perform numeric process-
ing for DSP algorithms. Each processing element contains a data register
file and three computation units—an arithmetic/logic unit (ALU), a mul-
tiplier, and a shifter. Computational instructions for these elements
include both fixed-point and floating-point operations, and each compu-
tational instruction executes in a single cycle.
The computational units in a processing element handle different types of
operations. The ALU performs arithmetic and logic operations on
fixed-point and floating-point data. The multiplier performs float-
ing-point and fixed-point multiplication and executes fixed-point
multiply/add and multiply/subtract operations. The shifter completes log-
ical shifts, arithmetic shifts, bit manipulation, field deposit, and field
extraction operations on 32-bit operands. Also, the shifter can derive
exponents.
Data flow paths through the computational units are arranged in parallel,
as shown in Figure
as the input of any computational unit on the next instruction cycle. Data
moving in and out of the computational units goes through a 10-port reg-
ister file, consisting of 16 primary registers and 16 alternate registers. Two
ports on the register file connect to the PM and DM data buses, allowing
data transfer between the computational units and memory (and anything
else) connected to these buses.
ADSP-2126x SHARC Processor Hardware Reference
2-1. The output of any computational unit may serve
2-1