Analog Devices ADSP-21261 SHARC Hardware Reference Manual page 681

EEMUINENS
EEMUIN Interrupt Enable
EEMUENS
Enhanced Emulation Feature Enable
Status
EEMUINFULL
EEMUIN FIFO Full Status
EEMUOUTFULL
EEMUOUT FIFO Full Status
EEMUOUTRDY
EEMUOUT Valid Data Status
EEMUOUTIRQEN
EEMUOUT Interrupt Enable
STATIO0
DMA Peripheral Address Break-
point Status
Figure A-16. EEMUSTAT Register
Table A-20. EEMUSTAT Register Bit Descriptions
Bit Name
0 STATPA
1 STATDA0
2 STATDA1
ADSP-2126x SHARC Processor Hardware Reference
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
0 0 0 0 0 0 0 0
15 14 13 12 11 10 9
0 0 0 0 0 0 0
Description
Program Memory Data Breakpoint Hit.
0 = No program memory breakpoint occurs
1 = Program memory breakpoint occurs
Data Memory Breakpoint Hit.
0 = No data memory #0 breakpoint occurs
1 = Data memory #0 breakpoint occurs
Data Memory Breakpoint Hit
0 = No data memory #1 breakpoint occurs
1 = Data memory #1 breakpoint occurs
Registers Reference
0 0 0 0 0 0 0
8 7 6 5 4 3 2 1
0 0 0 0 0 0 0 0
.1
0
STATIO1
DMA EP Address Breakpoint
Status
0
0
STATPA
Program Memory Break-
point Status
STATDA0
DM Breakpoint #0 Status
STATDA1
DM Breakpoint #1 Status
STATIA0
Instruction Breakpoint #0 Status
STATIA1
Instruction Breakpoint #1 Status
STATIA2
Instruction Breakpoint #2 Status
STATIA3
Instruction Breakpoint #3 Status
1
1
A-59