Short Word Addressing Of Single-Data In Sisd Mode - Analog Devices ADSP-21261 SHARC Hardware Reference Manual

memory locations. For more information and examples, see ADSP-21160
DSP Instruction Set Reference.
• Programs can use odd or even modify values (1, 2, 3, ...) to step
through a buffer in single- or dual-data, SISD or broadcast load
mode regardless of the data word size (long word, extended-preci-
sion normal word, normal word, or short word).
• Programs should use a multiple of 4 modify values (4, 8, 12, ...) to
step through a buffer of short word data in single- or dual-data,
SIMD mode. Programs must step through a buffer twice, once for
addressing even short word addresses and once for addressing odd
short word addresses.
• Programs should use a multiple of 2 modify values (2, 4, 6, ...) to
step through a buffer of normal word data in single- or dual-data
SIMD mode.
• Programs can use odd or even modify values (1, 2, 3, ...) to step
through a buffer of long word or extended-precision normal word
data in single- or dual-data SIMD modes.

Where a cross (†) appears in the
ing figures, it indicates that the processor zero-fills or sign-extends
the most significant 16 bits of the data register while loading the
short word value into a 40-bit data register. Zero-filling or
sign-extending depends on the state of the
tem register. For short word transfers, the least significant 8 bits of
the data register are always zero.

Short Word Addressing of Single-Data in SISD Mode

Figure 5-11 shows the SISD single-data, short word addressed access
mode. For short word addressing, the processor treats the data buses as
four 16-bit short word lanes. The 16-bit value for the short word access is
transferred using the least significant short word lane of the PM or DM
ADSP-2126x SHARC Processor Hardware Reference
registers in any of the follow-
PEx
bit in the
SSE
Memory
sys-
MODE1
5-31