SPORT Transmit Buffer Registers (TXSPx)
The addresses of the
TXSP0A – 0xc60
TXSP1A – 0xc64
TXSP2A – 0x460
TXSP3A – 0x464
TXSP4A – 0x860
TXSP5A – 0x864
The reset value for these registers is undefined. The 32-bit
hold the output data for serial port transmit operations. For more infor-
mation on how transmit buffers work, see
Buffers" on page
SPORT Receive Buffer Registers (RXSPx)
The addresses of the
RXSP0A – 0xc61
RXSP1A – 0xc65
RXSP2A – 0x461
RXSP3A – 0x465
RXSP4A – 0x861
RXSP5A – 0x865
The reset value for these registers is undefined. The 32-bit
hold the input data from serial port receive operations. For more informa-
tion on how receive buffers work, see
Buffers" on page
ADSP-2126x SHARC Processor Hardware Reference
registers are:
TXSPx
TXSP0B – 0xc62
TXSP1B – 0xc66
TXSP2B – 0x462
TXSP3B – 0x466
TXSP4B – 0x862
TXSP5B – 0x866
9-60.
registers are:
RXSPx
RXSP0B – 0xc63
RXSP1B – 0xc67
RXSP2B – 0x463
RXSP3B – 0x467
RXSP4B – 0x863
RXSP5B – 0x867
9-60.
Registers Reference
"Transmit and Receive Data
"Transmit and Receive Data
registers
TXSPx
registers
RXSPx
A-85
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