Analog Devices ADSP-21261 SHARC Hardware Reference Manual page 756

I/O Processor Registers
SRU_EXT_MISCB
(0x2471)
Reserved
INV_MISCB5_I
Invert Miscellaneous
Channel B 5
DAI_INT_27
DAI Interrupt 27
FLAG12_I
Flag 12 Interrupt
15 14 13 12 11 10
0
MISCB3_I
MISCB2_I
External Miscellaneous
Channel B 2
DAI_INT_24
DAI Interrupt 24
TIMER2_I
Timer 2 Input
Figure A-51. SRU_EXT_MISCB Register
Setting the
SRU_EXT_MISCA[30]
and setting the
.
MISCA5_I
A-134
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
0 0 1 1 1 1 0 1
9 8
1 1 1 1 0 1 1
bit to
SRU_EXT_MISCA[31]
ADSP-2126x SHARC Processor Hardware Reference
1 1 1 0 1 1 1
7 6 5 4 3 2 1 0
1 1 0 1 1 1 1 0
inverts the level of
HIGH
bit to inverts the level of
HIGH
1
MISCB3_I
External Miscellaneous
Channel B 3
DAI_INT_25
DAI Interrupt 25
FLAG10_I
Flag 10 Interrupt
MISCB4_I
External Miscellaneous
Channel B 4
DAI_INT_26
DAI Interrupt 26
FLAG11_I
Flag 11 Interrupt
MISCB0_I
External Miscellaneous
Channel B 0
DAI_INT_22
DAI Interrupt 22
TIMER0_I
Timer 2 Input
MISCB1_I
External Miscellaneous
Channel B 1
DAI_INT_23
DAI Interrupt 23
TIMER1_I
Timer 1 Input
MISCA4_I
,