Background Telemetry Channel (Btc); User-Definable Breakpoint Interrupts - Analog Devices ADSP-21261 SHARC Hardware Reference Manual

Background Telemetry Channel (BTC)

The breakpoint start/end registers are mapped into the IOP register space
of the ADSP-2126x. The
same address space as the ADSP-2106x DSP. These facilities are
Ureg
read-only by the ADSP-2126x core in normal operation.
Background Telemetry Channel (BTC)
Programmers can read and write data to a set of memory-mapped buffers
( and
EEMUIN EEMUOUT
running. This function allows the emulator to feed new data to the DSP
or get updates from the DSP in real time. A 32-bit memory-mapped I/O
register called
EEMUSTAT
the status of the input and output data buffers. Low priority emulator
interrupts are generated when the
FIFO is empty so that the DSP core can handle reading/writing data
from/to the buffers in an interrupt service routine (ISR). These interrupts
are handled in the same way that normal interrupts are handled in the
processor.

User-Definable Breakpoint Interrupts

The JTAG emulation port supports 3 interrupts:
1. EMUI (highest priority, emulator)
2. BKPI (user HW breakpoints)
3. EMULI (lowest priority, BTC)
If using the user breakpoint feature (
legal or illegal address on all buses (DM, PM, IO). If such an exception
event occurs the sequencer branches to the
6-4
, , and
EMUN EMUCLK
) that are accessible by the emulator while the core is
can be used to enable this functionality and check
EEMUIN
BRKCTL
ADSP-2126x SHARC Processor Hardware Reference
registers occupy the
EMUCLK2
buffer is full or the
register) it allows to detect
interrupt if enabled.
BKPI
EEMUOUT