Table of Contents
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SIGNAL ROUTING UNIT
IDP
DMA0
IDP
DMA
[7:1]
DAI
CORE
INTERFACE
SHARC
SIMD CORE
AND MEMORY
Figure 12-2. DAI System Design (continued)
ADSP-2126x SHARC Processor Hardware Reference
PDAP_STRB_O
PDAP
IDP0
IDP0_DAT_I
IDP0_FS_I
IDP0_CLK_I
IDP1
IDP2
IDP3
IDP4
IDP5
IDP6
IDP7
IDP7_DAT_I
IDP7_FS_I
IDP7_CLK_I
IDP
PCG
PCG_EXTA_I
PCG_CLKA_O
PCG_FSA_O
PCG_EXTB_I
PCG_CLKB_O
PCG_FSB_O
Digital Audio Interface
DAI PIN
BUFFERS
DAI_PB01_O
DAI_PB01_I
DAI_PB01_PE_I
DAI_PB02_O
DAI_PB02_I
DAI_PB02_PE_I
DAI_PB03_O
DAI_PB03_I
DAI_PB03_PE_I
DAI_PB04_O
DAI_PB04_I
DAI_PB04_PE_I
DAI_PB05_O
DAI_PB05_I
DAI_PB05_PE_I
DAI_PB06_O
DAI_PB06_I
DAI_PB06_PE_I
DAI_PB07_O
DAI_PB07_I
DAI_PB07_PE_I
DAI_PB08_O
DAI_PB08_I
DAI_PB08_PE_I
DAI_PB09_O
DAI_PB09_I
DAI_PB09_PE_I
DAI_PB10_O
DAI_PB10_I
DAI_PB10_PE_I
DAI PINS
DAI_P01
DAI_P02
DAI_P03
DAI_P04
DAI_P05
DAI_P06
DAI_P07
DAI_P08
DAI_P09
DAI_P10
12-5
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