Analog Devices ADSP-21261 SHARC Hardware Reference Manual page 111

Table 2-17. Register-to-Register Move Summary (SISD Versus SIMD)
Mode Instruction
1 IF condition compute, Rx = Ry;
SISD
IF condition compute, Rx = Sy;
IF condition compute, Sx = Ry;
IF condition compute, Sx = Sy;
IF condition compute, Rx <-> Sy;
2 IF condition compute, Rx = Ry;
SIMD
IF condition compute, Rx = Sy;
IF condition compute, Sx = Ry;
IF condition compute, Sx = Sy;
IF condition compute, Rx <-> Sy;
1 In SISD mode, the conditional applies only to the entire operation and is only tested against PEx's
flags. When the condition tests true, the entire operation occurs.
2 In SIMD mode, the conditional applies separately to the explicit and implicit transfers. Where the
condition tests true (PEx for the explicit and PEy for the implicit), the operation occurs in that pro-
cessing element.
3 Register-to-register transfers (R0=S0) and register swaps (R0<->S0) do not cause a PMD bus conflict.
These operations use only the DMD bus and a hidden 16-bit bus to perform the two register moves.

SIMD conditional instructions with the same destination registers
do not produce predictable transfers. For example, the instruction
IF EQ R4 = R14 — R15, S4 = R6;
kind of usage is prohibited, as it is not logical to use it this way.
ADSP-2126x SHARC Processor Hardware Reference
Processing Elements
Explicit Transfer
Executed According
to PEx
Rx loaded from Ry
Rx loaded from Sy
Sx loaded from Ry
Sx loaded from Sy
Rx loaded from Sy
Rx loaded from Ry
Rx loaded from Sy
Sx loaded from Ry
Sx loaded from Sy
3 Rx loaded from Sy
may not work as expected. This
Implicit Transfer
Executed According
to PEx
None
None
None
None
Sy loaded from Rx
Sx loaded from Sy
Sx loaded from Ry
Rx loaded from Sy
Rx loaded from Ry
Sy loaded from Rx
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