Spi Device Select Input Pin; Buffering And Transmit/Receive Registers - Analog Devices ADSP-21261 SHARC Hardware Reference Manual

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SLAVE DEVICE

Figure 10-8. Single Master, Multiple Slave Configuration

SPI Device Select Input Pin

The behavior of the

If the SPI is a slave,

can serve as an error-detection input for the SPI in a multi-

master environment. The

the SPI master mode feature. When

ter mode error input; otherwise,

pins can be observed in the flag I/O module's data register.

hold SPI data for transmit and receive operations.

Check the buffer status before reading from or writing to these registers

because the core does not hang when it attempts to read from an empty

buffer or write to a full buffer. When the core writes to a full buffer, the

data in that buffer is overwritten and the SPI begins transmitting the new

data. Invalid data is obtained when the core reads from an empty buffer.

ADSP-2126x SHARC Processor Hardware Reference

SLAVE DEVICE

input depends on the configuration of the SPI.

acts as the slave-select input. When enabled as a

bit (bit 4) in the

registers are 32-bit memory-mapped registers that

Serial Peripheral Interface Port

is ignored. The state of these input

SLAVE DEVICE

input is the mas-

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