Secondary Processing Element (Pey) - Analog Devices ADSP-21261 SHARC Hardware Reference Manual

Or, the DSP can perform the following result register transfer and parallel
read:
R5 = MR1F, R6 = DM(I1,M2);

Secondary Processing Element (PEy)

The ADSP-2126x contains two sets of computational units and associated
register files. As shown in
and PEy) support SIMD operation.
DI FFERENT DATA GOES TO EACH ELEMENT
PM DAT A BUS
BUS
CONNECT
D M DATA BU S
(PX )
D ATA
REGIST ER
FIL E
( PEx)
BARREL
16 x 40-BIT
MUL T
SHIF TER
AL U
SA ME I NST RUCT ION G OES T O BOT H ELEMENTS
Figure 2-16. Block Diagram Showing Secondary Execution Complex
The register controls the operating mode of the processing ele-
MODE1
ments. Table A-2 on page A-5
21) in the
MODE1
When is cleared (0), the ADSP-2126x operates in SISD mode,
PEYEN
ADSP-2126x SHARC Processor Hardware Reference
Figure 2-16, these two processing elements (PEx
16/32/40/64
16/32/40/64
BARREL
SHIF TER
ALU
PROGRAM
SEQUENCER
lists all the bits in
register enables or disables the PEy processing element.
Processing Elements
DATA
REGISTER
F ILE
(PEy)
16 x 40- BIT
MULT
. The
MODE1
bit (bit
PEYEN
2-45