• DMA enable (
• DMA chaining enable (
Setting Word Length (SLEN)
SPORTs handle data words containing 8 to 32 bits in I
grams need to set the bit length for transmitting and receiving data words.
For details, see
The transmitter sends the MSB of the next word one clock cycle after the
word select (
TFS
2
In I
S mode, load the
mit or receive words continuously. For example, for 8-bit data words
(
= 7), set
SLEN
Enabling SPORT Master Mode (MSTR)
The SPORTs transmit and receive channels can be configured for Master
or Slave mode. In Master mode, the processor generates the word select
and serial clock signals for the transmitter or receiver. In slave mode, an
external source generates the word select and serial clock signals for the
transmitter or receiver. When
external word select and clock source. The SPORT transmitter or receiver
is a slave. When
clock for word select and clock source. The SPORT transmitter or receiver
is the master. For more information, see
and Frame Sync Rates" on page
Selecting Transmit and Receive Channel Order (FRFS)
In Master and Slave modes, it is possible to configure the I
which each SPORT channel transmits or receives first. The left and right
2
I
S channels are time-duplexed data channels.
ADSP-2126x SHARC Processor Hardware Reference
and
SDEN_A
SCHEN_A
"Word Length" on page
) signal changes.
register with the same value as
FSDIV
= 7.
FSDIV
MSTR
is set (=1), the processor uses the processor's internal
MSTR
9-15.
)
SDEN_B
and
SCHEN_B
9-39.
is cleared (=0), the processor uses an
"Setting the Internal Serial Clock
Serial Ports
)
2
S Mode. Pro-
to trans-
SLEN
2
S channel to
9-21
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