Analog Devices ADSP-21261 SHARC Hardware Reference Manual page 833

processing element Y enable (PEYEN) bit,
SIMD mode, 2-12, 2-46, 4-4, 4-6,
4-18, 5-19, 5-27
processor
clock frequency, 9-1
core, 1-5
core enhancements, 1-15
processor core, 1-5
buses, 1-9
processor core stalls, 3-21
program control interrupt See PCI bit
program counter, relative address (PC)
register, 3-12
program counter, relative address See PC
register
program counter, stack See PC register
program counter (PC) register, 3-2, 3-16,
A-33
program counter stack empty (PCEM) bit,
3-17, A-19
program counter stack full (PCFL) bit,
3-17, A-19
program counter stack (PCSTK) register,
3-63, A-34
program counter stack pointer (PCSTKP)
register, 3-17, 3-63,
program fetch See program sequencer
program flow, 3-4
programmable clock cycles,
programmable flag See PFx pins
programmable interrupt bits,
program memory address (PMDAx)
register, A-56
program memory breakpoint hit
(STATPA) bit, A-59
program memory bus exchange (PX)
register, 5-6, 5-19,
program memory bus exchange See PX
register
program memory (PM) bus,
ADSP-2126x SHARC Processor Hardware Reference
A-34
8-8
A-30 to A-32
A-23
1-2
program sequence address (PSAx) register,
A-55
program sequencer
control, 1-6
latency, 3-63
PSAx register, A-55
PSx, DMx, IOx, & EPx registers, A-55,
A-58
pulse width, 13-9
pulse width count and capture
(WDTH_CAP) mode,
pulse width modulation (PWMOUT)
mode, 14-7
push
loop counter stack, 3-34
program counter (PC) stack,
status stack, 3-57
pushing loop counter stack (nested loops),
3-36
PWMOUT mode, 14-1,
PX register, 1-9, 5-6, 5-19,
R
read cycle, 8-5
receive buffers, 9-60
receive busy
(overflow error) SPI DMA status See
ROVF bit
(overflow error) SPI DMA status See
SPIROVF bit
receive busy (overflow error) SPI DMA
status See ROVF bit
receive data
See ROVF bit
See RXSPI buffer
See RXSPx registers
receive data buffer
See RXSPI register
status See RXS bit
Index
14-10
3-11
14-7
A-23
I-23