Sport Count Registers (Spcntx; Sport Transmit Select Registers (Mtxcsy - Analog Devices ADSP-21261 SHARC Hardware Reference Manual

SPORT Count Registers (SPCNTx)

The addresses of the
SPCNT0 – 0xC15
SPCNT2 – 0x415
SPCNT4 – 0x815
The reset value for these registers is undefined. The
vides status information for the internal clock and frame sync.

SPORT Transmit Select Registers (MTxCSy)

The addresses of the
MT0CS0 – 0xC05
MT0CS2 – 0xC07
MT2CS0 – 0x405
MT2CS2 – 0x407
MT4CS0 – 0x805
MT4CS2 – 0x807
The reset value for these registers is undefined.
Each bit, 31–0, set (= 1) in one of four
active transmit channel, 127–0, on a Multichannel mode serial port.
When the
MTxCSy
word in that channel's position of the data stream. When a channel's bit
in the register is cleared (= 0), the serial port's data transmit pin
MTxCSy
three-states during the channel's transmit time slot.
ADSP-2126x SHARC Processor Hardware Reference
registers are:
SPCNTx
SPCNT1 – 0xC16
SPCNT3 – 0x416
SPCNT5 – 0x816
registers are:
MTxCSy
MT0CS1 – 0xC06
MT0CS3 – 0xC08
MT2CS1 – 0x406
MT2CS3 – 0x408
MT4CS1 – 0x806
MT4CS3 – 0x808
registers activate a channel, the serial port transmits the
Registers Reference
SPCNTx
registers corresponds to an
MTxCSy
registers pro-
A-87