_main:
/* Using PWM Out mode as a core timer */
ustat3 = TIMODEPWM|
PRDCNT|
IRQEN;
dm(TM0CTL) = ustat3;
R0 = 0x8000;
dm(TM0PRD) = R0;
R1 = 1;
dm(TM0W) = R1;
R0 = TIM0EN;
dm(TMSTAT) = R0;
/* Get start clock count */
R1 = EMUCLK;
// Wait until TIM0IRQ is set
// Alternatively, we could test GPTMR0I in IRPTL
r0=dm(TMSTAT);
btst r0 by 0;
if not sz jump (pc,2);
jump(pc,-3) (db);
/* Get end clock count */
R2=EMUCLK;
/* Subtract the start count from the end count
to obtain the number of cycles before the interrupt */
R4=R2-R1;
// R4 will be double the value of TM0PRD
_main.end: jump(pc,0);
ADSP-2126x SHARC Processor Hardware Reference
/* PWM Out Mode */
/* Count to end of period */
/* Timer 0 period = 0x8000 */
/* Timer 0 Pulse width = 1 */
/* enable timer 0 */
Peripheral Timer
14-19
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