Alu Saturation - Analog Devices ADSP-21261 SHARC Hardware Reference Manual

Arithmetic Logic Unit (ALU)
the ALU operation returns two results, and in compare operations, the
ALU operation returns no result (only flags are updated). ALU results can
be returned to any location in the register file.
The DSP transfers input operands from the register file during the first
half of the processor cycle and transfers results to the register file during
the second half of the cycle. With this arrangement, the ALU can read and
write the same register file location in a single cycle. If the ALU operation
is fixed-point, the inputs are treated as 32-bit fixed-point operands. The
ALU transfers the upper 32 bits from the source location in the register
file. For fixed-point operations, the result(s) are always 32-bit fixed-point
values. Some floating-point operations (
fixed-point results.
The DSP transfers fixed-point results to the upper 32 bits of the data reg-
ister and clears the lower eight bits of the register. The format of
fixed-point operands and results depends on the operation. In most arith-
metic operations, there is no need to distinguish between integer and
fractional formats. Fixed-point inputs to operations such as scaling a float-
ing-point value are treated as integers. For purposes of determining status
such as overflow, fixed-point arithmetic operands and results are treated as
twos-complement numbers.

ALU Saturation

When the
ALUSAT
tion mode. In this mode, all positive fixed-point overflows return the
maximum positive fixed-point number (0x7FFF FFFF), and all negative
overflows return the maximum negative number (0x8000 0000).
When the
ALUSAT
results that overflow are not saturated; the upper 32 bits of the result are
returned unaltered.
The ALU overflow flag reflects the ALU result before saturation.
2-18
bit is set (=1) in the
bit is cleared (=0) in the
ADSP-2126x SHARC Processor Hardware Reference
, and
Logb Mant Fix
register, the ALU is in satura-
MODE1
register, fixed-point
MODE1
) can also yield