Parallel Port Dma Receive Register (Rxpp) - Analog Devices ADSP-21261 SHARC Hardware Reference Manual

I/O Processor Registers

Parallel Port DMA Receive Register (RXPP)

This register's address is 0x1809. This is a 32-bit read-only register acces-
sible by the core or the DMA controller. At the end of a data transfer,
is loaded with the data in the shift register. During a DMA receive
RXPP
operation, the data in the
internal memory. For core or interrupt driven transfer, you can also use
the status bits in the
RXS
is full.
Parallel Port DMA Start Internal Index
Address Register (IIPP)
This register's address is 0x1818. This 19-bit register contains the offset
from the DMA starting address of 32-bit internal memory.
Parallel Port DMA Internal Modifier
Address Register (IMPP)
This register's address is 0x1819. This 16-bit register contains the internal
memory DMA address modifier.
Parallel Port DMA Internal Word
Count Register (ICPP)
This register's address is 0x181A. This 16-bit register contains the number
of words in internal memory to be transferred via DMA.
Parallel Port DMA Start External
Index Address Register (EIPP)
This register's address is 0x1810. This 24-bit register contains the external
memory DMA address index.
A-112
register is automatically loaded into the
RXPP
register to determine if the receive buffer
PPSTAT
ADSP-2126x SHARC Processor Hardware Reference