Spi Dma Word Count Register (Cspi); Error Signals And Flags; Mode Fault Error (Mme) - Analog Devices ADSP-21261 SHARC Hardware Reference Manual

Error Signals and Flags

SPI DMA Word Count Register (CSPI)

This 16-bit register contains the number of DMA words to be transferred.
When this register decrements from one to zero, the DMA is complete,
and an interrupt may be triggered.

To prematurely end a DMA transfer, software should write the
value one to the Count register so that it will decrement to zero.
Writing a value of zero causes the count to decrement to a negative
number, and this is not advised.
Error Signals and Flags
This section describes the error signals and flags that determine the cause
of transmission errors for an SPI port. The bits
in the
SPISTAT
bits ( ,
SPIMME SPIUNF
error occurs during a DMA transfer. These sticky bits generate an SPI
interrupt when any one of them are set.

Mode Fault Error (MME)

The bit is set in the
MME
device that is enabled as a master is driven low by some other device in the
system. This occurs in multimaster systems when another device is also
trying to be the master.
To enable this feature, set the
this error is detected, the following actions are taken.
1. The
SPIMS
interface as a slave.
2. The
SPIEN
system.
10-40
register when a transmission error occurs. Corresponding
and ) in the
SPIOVF
register when the
SPISTAT
ISSEN
control bit in
SPICTL
control bit in
SPICTL
ADSP-2126x SHARC Processor Hardware Reference
,
MME TUNF
register are set when an
SPIDMAC
SPIDS
bit in the register. As soon as
SPICTL
is cleared, configuring the SPI
is cleared, disabling the SPI
and are set
ROVF
input pin of a