7 I/O PROCESSOR
In applications that use extensive off-chip data I/O, programs may find it
beneficial to use a processor resource other than the processor core to per-
form data transfers. The ADSP-2126x contains an I/O processor (IOP)
that supports a variety of DMA (direct memory access) operations. Each
DMA operation transfers an entire block of data.
The DMA operations include the transfer types listed below and shown in
Figure 7-3 on page
• Internal memory
• Internal memory
• Internal memory
• Internal memory
By managing DMA, the I/O processor frees the processor core, allowing it
to perform other processor operations while off-chip data I/O occurs as a
background task. The dual-ported internal memory allows the core and
IOP to simultaneously access the same block of internal memory. This
means that DMA transfers to internal memory do not impact core perfor-
mance. The processor core continues to perform computations without
penalty.
To further increase off-chip I/O, multiple DMAs can occur at the same
time. The IOP accomplishes this by managing DMAs of processor mem-
ory through the parallel, SPI, input data port (IDP) and serial ports.
ADSP-2126x SHARC Processor Hardware Reference
7-22:
external memory devices
serial port (DAI)
SPI I/O
IDP (DAI)
7-1
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