Parallel Port Registers - Analog Devices ADSP-21261 SHARC Hardware Reference Manual

I/O Processor Registers

Parallel Port Registers

The Parallel Port peripheral in the ADSP-2126x processor includes several
user-accessible registers. One register, (
Two registers, (
operations. Six registers are used for DMA functionality—
, ,
ICPP EIPP EMPP
Table A-32. Parallel Port Registers
Function
Control and Status
Register
Buffering Receive and
Transmit Data
DMA functionality
A-108
and ), are used for buffering receive and transmit
RXPP TXPP
, and .
ECPP
Registers
PPCTL
TXPP
RXPP
IIPP
IMPP
ICPP
EIPP
EMPP
ECPP
ADSP-2126x SHARC Processor Hardware Reference
), contains control and status.
PPCTL
Description
"Parallel Port Control Register (PPCTL)" on
page A-108
"Parallel Port DMA Transmit Register (TXPP)" on
page A-111
"Parallel Port DMA Receive Register (RXPP)" on
page A-112
"Parallel Port DMA Start Internal Index Address
Register (IIPP)" on page
"Parallel Port DMA Internal Modifier Address Reg-
ister (IMPP)" on page A-112
"Parallel Port DMA Internal Word Count Register
(ICPP)" on page A-112
"Parallel Port DMA Start External Index Address
Register (EIPP)" on page A-112
"Parallel Port DMA External Modifier Address Reg-
ister (EMPP)" on page A-113
"Parallel Port DMA External Word Count Register
(ECPP)" on page A-113
, ,
IIPP IMPP
A-112r