Analog Devices ADSP-21261 SHARC Hardware Reference Manual page 836

Index
serial port
2
enabling I S mode (OPMODE), 9-15,
9-21
enabling master mode (MSTR), 9-16,
9-21
enabling with SPCTLx registers,
features, 9-1
frame sync See IFS or IRFS bit, internal
FS both enable See FS_BOTH bit
general information,
interrupts, 9-65, 9-68
interrupt See SPxI bit
late frame sync See LAFS bit
named, 9-1
operation modes, 9-9,
priority of interrupts,
registers See SP registers, listed
signals, 9-5
SPCTLx control bit comparison
timing example for word select timing in
2
I S mode, 9-17, 9-23
transmit buffer See TXx registers
word length, 9-39
serial port control See SPCTLx registers
serial port modes
2
I S (Tx/Rx on left channel first),
2
I S (Tx/Rx on right channel first),
left-justified sample pair mode
Tx/Rx on FS falling edge,
Tx/Rx on FS rising edge,
multichannel A and B channels,
standard DSP, 9-10
serial port receive compand See MRxCCSy
registers
serial port receive select See MRxCSy
registers
serial port receive underflow status See
ROVF_A or TUVF_A bit
serial port (SPORT), G-9
multichannel operation,
I-26
(continued)
9-7
1-11
9-51
9-65
9-10
9-10
9-10
9-10
9-10
G-10
ADSP-2126x SHARC Processor Hardware Reference
serial port transmit compand See
MTxCCSy registers
serial port transmit underflow status See
TUVF_A bit
serial scan path, 6-6
serial test access port (TAP),
serial word endian select bit See LSBF bit
serial word length See SLEN bits
serial word length select (SLENx) bits,
set, bit, 2-30
setting the internal serial clock and frame
sync rates, 9-20
setup time, inputs, 15-4
SFDR register, 10-38
S field, address, A-33
SFTx (user software interrupt) bits,
shadow write FIFO, 5-12
SHARC, G-9
background information,
See also porting from previous SHARCs
shift bits, 2-30
shift data See SFDR register
shifter, 1-5, 1-15, 2-30,
instructions, 2-14, 2-36
operations, 2-31, 2-35,
status flags, 2-35
shifter input sign (SS) bit,
shift registers, A-100
short (16-bit data) sign extend (SSE) bit,
5-26, A-6
short word, 5-13, 5-26
data access, 5-26
data storage, 5-2
SIMD mode, 5-36, 5-38,
SISD mode, 5-31, 5-34
signal naming convention,
signal routing unit (SRU), 9-6, 11-1, 12-1,
12-3, 13-1, 14-1,
communication with the core,
overview, A-113
6-2
9-54
A-30
1-14
G-9
A-14
A-15
5-44
12-6
A-113
12-1