Slave Mode Dma Operation - Analog Devices ADSP-21261 SHARC Hardware Reference Manual

Table 10-1. Transfer Initiation (Cont'd)
TIMOD Function
10 Transmit or
Receive with
DMA
11 Reserved

Slave Mode DMA Operation

A Slave mode DMA transfer occurs when the SPI port is enabled and con-
figured in Slave mode, and DMA is enabled. When the
transitions to the active-low state or when the first active edge of
detected, it triggers the start of a transfer.
To configure for Slave mode DMA:
1. Write to the
same as the mode that is set up in the SPI master. Configure the
field to select transmit or receive DMA mode
TIMOD
( = 10).
TIMOD
2. Define a DMA receive (or transmit) transfer by writing to the
,
IISPI IMSPI
chain pointer address of the
ADSP-2126x SHARC Processor Hardware Reference
Serial Peripheral Interface Port
Transfer Initiated Upon
Initiate new multiword
transfer upon write to
DMA Enable bit. Individ-
ual word transfers begin
with either a DMA write
to TXSPI or a DMA read
of RXSPI depending on
the direction of the trans-
fer as specified by the
SPIRCV bit.
register to make the mode of the serial link the
SPICTL
, and registers. For DMA chaining, write to the
CSPI
CPSPI
Action, Interrupt
If chaining is disabled, the SPI inter-
rupt is latched in the cycle when the
DMA count decrements from 1 to 0.
If chaining is enabled, interrupt func-
tion is based on the PCI bit in the CP
register. If PCI = 0, the SPI interrupt
is latched at the end of the DMA
sequence. If PCI = 1, then the SPI
interrupt is latched after each DMA
in the sequence. For more informa-
tion, see "DMA Transfer Direction"
on page 7-21.
SPIDS
register.
signal
is
SPICLK
10-17