10 SERIAL PERIPHERAL
INTERFACE PORT
The ADSP-2126x processor is equipped with a synchronous serial periph-
eral interface port that is compatible with the industry-standard Serial
Peripheral Interface (SPI). The SPI port supports communication with a
variety of peripheral devices including codecs, data converters, sample rate
converters, S/PDIF or AES/EBU digital audio transmitters and receivers,
LCDs, shift registers, microcontrollers, and FPGA devices with SPI emu-
lation capabilities.
The processor's SPI port provides the following features and capabilities:
• A simple 4-wire interface consisting of two data pins, a device
select pin, and a clock pin
• Full-duplex operation (core and DMA) that allows the
ADSP-2126x to transmit and receive data simultaneously on the
same port
• Special data formats to accommodate little and big endian data,
different word lengths, and packing modes
• Master and Slave modes as well as Multimaster mode in which the
ADSP-2126x processor can be connected to up to four other SPI
devices
• Open drain outputs to avoid data contention and to support multi-
master scenarios
• Programmable baud rates, clock polarities, and phases
ADSP-2126x SHARC Processor Hardware Reference
10-1
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