Analog Devices ADSP-21261 SHARC Hardware Reference Manual page 279

ANY BLOCK
...
...
...
63-48
PM DATA
BUS
PEX REGISTERS
39-24 23-8
PEY REGISTERS
39-24 23-8
OTHER INSTRUCTIONS WITH SIMILAR DATA FLOWS FOR BROADCAST, LONG WORD, SINGLE-DATA TRANSFERS ARE:
Figure 5-39. Long Word Addressing of Single-Data in Broadcast Load
ADSP-2126x SHARC Processor Hardware Reference
... ... ...
... ... ...
... ... ...
WORD Y2
WORD Y1
WORD Y0
NO ACCESS
47-32 31-16 15-0
RB
7-0 39-24 23-8
SB
7-0 39-24 23-8
THIS EXAMPLE SHOWS THE DATA FLOW FOR INSTRUCTION:
RX = DM(LONG WORD X0 ADDRESS);
UREG = PM(LONG WORD ADDRESS);
UREG = DM(LONG WORD ADDRESS);
MEMORY
ANY OTHER BLOCK
...
...
...
63-48
DM DATA
BUS
RA
7-0 39-24 23-8
WORD X0, 63-32
SA
7-0 39-24 23-8
WORD X0, 63-32
Memory
... ... ...
... ... ...
... ... ...
WORD X2
WORD X1
WORD X0
LONG WORD ACCESS
47-32 31-16 15-0
WORD X0
RY
7-0 39-24 23-8
0X00
WORD X0, 31-0
SY
7-0 39-24 23-8
0X00
WORD X0, 31-0
RX
7-0
0X00
SX
7-0
0X00
5-75