Pex Multiplier Result Registers (Mrfx, Mrbx - Analog Devices ADSP-21261 SHARC Hardware Reference Manual

Core Registers

PEx Multiplier Result Registers (MRFx, MRBx)

The and
MRFx MRBx
primary or foreground (
results register. Fixed-point operations place 80-bit results in the multi-
plier's foreground
which is active. For more information on selecting the Result register, see
"Alternate (Secondary) Data Registers" on page
tion on result register fields, see
Integer Multiplier Fixed-point Result Placement
79
MR2
MRF OR MRB
PLACEMENT
OVE RFLOW
REGISTER FILE
PLACE MENT
Fractional Multiplier Fixed-point Result Placement
79
MR2
MRF OR MRB
PLACEMENT
OV ERFLOW
MV SET
REGISTER FILE
PLACEME NT
BINARY POINT
Figure A-7. MRFx and MRBx Registers
A-22
registers are non memory-mapped. The PEx unit has a
) register and alternate or background (
MRF
register or background
MRF
"Data Register File" on page
6 3
MR1
INTEGE R RESULT
MV SE T
OV ERFLOW ( IS LO ST)
63
MR1
FRACTIONAL RESULT
32 BITS
UREG
FRACTIO NAL RES ULT
ADSP-2126x SHARC Processor Hardware Reference
register, depending on
MRB
2-40. For more informa-
2-38.
31
MR0
INTEGE R RESULT
32 BITS
UREG
INTEG ER RES ULT
31
MR0
FRACTIONAL RESULT
8 BITS
ZE ROS
T
UNDERFLOW (IS LOS T)
)
MRB
0
BINARY POINT
8 BITS
ZEROS
0