Analog Devices ADSP-21261 SHARC Hardware Reference Manual page 679

Table A-19. EEMUSTAT (Breakpoint Status) Register Definitions
Bits Name
6 STATIA3
7 STATIO
8 Reserved1
9 EEMU-
OUTIRQEN
10 EEMUOUTRDY
11 EEMUOUTFULL
12 EEMUINFULL
13 EEMUENS
14 OSPIDENS
15 EEMUINENS
31:16 Reserved for future use.
1 Internal hardware sets this bit.
ADSP-2126x SHARC Processor Hardware Reference
Function
Instruction Address Breakpoint Hit
1 = Instruction address #3 breakpoint occurs
0 = no Instruction address #3 breakpoint occurs
I/O Address Breakpoint Hit
1 = I/O address breakpoint occurs
0 = no I/O address breakpoint occurs
Enhanced Emulation EEMUOUT Interrupt Enable
1 = EEMUOUT interrupt enable
0 = EEMUOUT interrupt disable
Note: Interrupts are of low priority interrupts
Enhanced Emulation EEMUOUT Ready
1 = EEMUOUT FIFO contains valid data
0 = EEMUOUT FIFO is empty
Enhanced Emulation EEMUOUT FIFO Status
1 = EEMUOUT FIFO FULL
0 = EEMUOUT FIFO is not FULL
Enhanced Emulation EEMUIN Register Status
1 = EEMUIN register full
0 = EEMUIN register is empty
Enhanced Emulation Feature Enable
1 = Enhanced emulation feature enable
0 = Enhanced emulation feature disable
OSPID Register Enable
1 = OSPID register enable
0 = OSPID register disable
EEMUIN Interrupt Enable.
1 = EEMUIN interrupt enable
0 = EEMUIN interrupt disable
Registers Reference
1
3
3
4
4
4
2
A-57