Analog Devices ADSP-21261 SHARC Hardware Reference Manual page 358

signal, synchronous to the
SPORTx_DB
signals are used, the
word being received. When an entire word is shifted in on the primary A
channel, the data is (optionally) expanded (SPORT1, 3, and 5 only), then
automatically transferred to the
shifted in on the secondary channel, it is automatically transferred to the
buffer.
RXSPxB
When the SPORT is configured as a receiver (
buffers are activated along with the corresponding A and B chan-
RXSPxB
nel receive shift registers, responding to
reception of data. The transmit
transmit A and B shift registers are inactive and do not respond to the
and
SPORTx_CLK
tive, writing to a transmit data buffer causes the core to hang indefinitely.

If the SPORTs are configured as receivers (
SPCTLx
TXSPxB
transmit buffer status becomes full. This causes the core to hang
indefinitely since data is never transmitted out of the deactivated
transmit data buffers.
The processor SPORTs are not UARTs and cannot communicate with an
RS-232 device or any other asynchronous communications protocol. One
way to implement RS-232 compatible communication with the processor
is to use two of the
nals. Examples of this can be found in the following documents.
• "Software UART", in Digital Signal Processing Applications Using
The ADSP-2100 Family, Volume 2.
• Engineer-to-Engineer Note (EE-191), Implementing a Glueless
UART Using the SHARC DSP SPORTs.
9-8
SPORTx_FS
. Since the
SPORTx_FS
), programs should not write to the inactive
buffers. If the core keeps writing to the inactive buffer, the
pins as asynchronous data receive and transmit sig-
FLG
ADSP-2126x SHARC Processor Hardware Reference
SPORTx_CLK
signal indicates the beginning of the serial
buffer. When an entire word is
RXSPxA
SPTRAN = 0
SPORTx_CLK
and
TXSPxA TXSPxB
and
TXSPxA
receive clock. If framing
), the
RXSPxA
and
SPORTx_FS
buffer registers and
buffers are inac-
TXSPxB
bit = 0 in
SPTRAN
and
TXSPxA
and
for