Analog Devices ADSP-21261 SHARC Hardware Reference Manual page 11

Short Word Addressing of Dual-Data in SIMD Mode ............ 5-38
32-Bit Normal Word Addressing of Single-Data in SISD Mode 5-40
32-Bit Normal Word Addressing of Dual-Data in SISD Mode 5-42
32-Bit Normal Word Addressing of Single-Data in SIMD Mode 5-44
32-Bit Normal Word Addressing of Dual-Data in SIMD Mode 5-46
Extended-Precision Normal Word Addressing of Single-Data .. 5-48
Extended-Precision Normal Word Addressing of Dual-Data ... 5-50
Long Word Addressing of Single-Data .................................... 5-52
Long Word Addressing of Dual-Data ..................................... 5-54
Broadcast Load Access ........................................................... 5-56
Mixed-Word Width Addressing of Long Word with Short Word 5-65
Mixed-Word Width Addressing of Long Word with Extended Word
5-67
JTAG TEST EMULATION PORT
JTAG Test Access Port ................................................................... 6-1
Boundary Scan .............................................................................. 6-2
Background Telemetry Channel (BTC) .......................................... 6-4
User-Definable Breakpoint Interrupts ............................................ 6-4
Restrictions ............................................................................. 6-5
Cycle Count Functionality (EMUCLK) Register ...................... 6-5
Silicon Revision ID ................................................................. 6-5
JTAG Related Registers ................................................................. 6-5
Instruction Register ................................................................. 6-6
Enhanced Emulation Status (EEMUSTAT) Register ................. 6-8
ADSP-2126x SHARC Processor Hardware Reference
Contents
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