Addressing In Sisd And Simd Modes - Analog Devices ADSP-21261 SHARC Hardware Reference Manual

DAG Operations
The instruction modifies addresses in any DAG index register
MODIFY
( - ) without accessing memory. If the
I0 I15
registers are set up for circular buffering, a
L
the specified buffer wraparound (if needed). The syntax for
ilar to post-modify addressing (index, then modifier). The
instruction accepts either a 32-bit immediate value or an
modifier. The following example adds 4 to
new value:
MODIFY(I1,4);
The instruction modifies and bit-reverses addresses in any DAG
BITREV
index register (
independent of the bit-reverse mode. The
immediate value to a DAG index register, bit-reverses the result, and
writes the result back to the same index register. The following example
adds 4 to , bit-reverses the result, and updates
I1
BITREV(I1,4);

Addressing in SISD and SIMD Modes

Single-Instruction, Multiple-Data (SIMD) mode (
change the addressing operations in the DAGs, but it does change the
amount of data that moves during each access. The DAGs put the same
addresses on the address buses in SIMD and Single-Instruction Sin-
gle-Data (SISD) modes. In SIMD mode, the DSP's memory and
processing elements get data from the named (explicit) locations in the
instruction syntax as well as complementary (implicit) locations. For more
information on data moves between registers, see
tional) Operations" on page
4-18
- ) without accessing memory. This instruction is
I0 I15
2-50.
ADSP-2126x SHARC Processor Hardware Reference
register's corresponding
I
instruction performs
MODIFY
MODIFY
register as the
M
and updates
I1 I1
instruction adds a 32-bit
BITREV
with the new value:
I1
bit=1) does not
PEYEN
"SIMD (Computa-
and
B
is sim-
MODIFY
with the