Setting Up Dma Channel Allocation And Priorities - Analog Devices ADSP-21261 SHARC Hardware Reference Manual

1. Enter chain insertion mode by setting
in the channel's DMA control register,
rupt indicates when the current DMA sequence has completed.
2. Copy the address currently held in the chain pointer register to the
chain pointer position of the last TCB in the chain that is being
inserted.
3. Write the start address of the first TCB of the new chain into the
chain pointer register.
4. Resume chained DMA mode by setting
SDEN_A
Chain insertion mode operates the same as non-chained DMA mode.
When the current DMA transfer ends, an interrupt request occurs and no
TCBs are loaded. This interrupt request is independent of the
state.

Chain insertion should not be set up as an initial mode of opera-
tion. This mode should only be used to insert one or more TCBs
into an active DMA chaining sequence.

Setting Up DMA Channel Allocation and Priorities

The ADSP-2126x processor has 22 DMA channels including 12 channels
accessible via the serial ports, one SPI channel, one parallel port channel,
and eight input data port channels. Each channel has a set of parameter
registers which are used to set up DMA transfers.
DMA channel allocation and parameter register assignments for the
ADSP-2126x processor. DMA channel 0 has the highest priority and
DMA channel 21 has the lowest priority.
ADSP-2126x SHARC Processor Hardware Reference
= 1.
I/O Processor
= 1 and
SCHEN_A SDEN_A
. The DMA inter-
SPCTL0
= 1 and
SCHEN_A
PCI
Table 7-3 shows the
= 0
bit
7-17