8-Bit Mode - Analog Devices ADSP-21261 SHARC Hardware Reference Manual

8-Bit Mode

An cycle always precedes the first transfer of data after the parallel port
ALE
is enabled. During
external address (
). In data cycles (reads and writes), the processor drives the lower 8
AD15–0
bits of address
are provided by
processor continues to receive and or send data with the same
until the upper 16 bits of external address differ from the previous access.
For consecutive accesses (
Figure 8-2 shows the connection diagram for the 8-bit mode.

Eight-bit mode enables a larger external address range.
ADSP-2126x
AD[15-8]
Figure 8-2. External Transfer—8-bit Mode
16-Bit Mode
In 16-bit mode, the external address range is
16-bit words). For a nonzero stride value (
ADSP-2126x SHARC Processor Hardware Reference
cycles for 8-bit mode, the upper 16 bits of the
ALE
) are driven on the 16-bit parallel port bus (pins
EA23–8
on . The 8 bits of external data,
EA7–0 AD15–8
, are sampled by the
AD7–0
= 1), this occurs once every 256 cycles.
EMPP
AD[7-0]
LATCH
D[7-0]
D[15-8]
ALE
ALE
RD
WR
SRAMCE
/ signal respectively. The
RD WR
8
DATA[7-0]
180
SRAM
8
DATA[7-0]
68
ADDR[7-0]
Q[15-0]
ADDR[23-8]
RD
WR
CE
FLASHCE CE
EA15–0
= 0), the transfer of data
EMPP
Parallel Port
, that
ED7–0
cycle
ALE
FLASH
(64K addressable
8-9