Branches And Sequencing - Analog Devices ADSP-21261 SHARC Hardware Reference Manual

Table 3-1. Cache Inefficient Code (Cont'd)
Address
...
0x021F

Branches and Sequencing

One type of nonsequential program flow that the sequencer supports is
branching. A branch occurs when a
moves execution to a location other than the next sequential address. For
descriptions on how to use
Processor Programming Reference. Briefly, these instructions operate as
follows.
• A
JUMP
memory location. The difference between a
a automatically pushes the return address (the next sequential
CALL
address after the
makes the address available for the
return from an
• A
RETURN
at the return address, which is stored at the top of the PC stack.
The two types of return instructions are return from subroutine
( ) and return from interrupt (
RTS
return address off the PC stack, the
and:
1. Clears the interrupt's bit in the interrupt latch register (
allows another interrupt to be latched in the
interrupt mask pointer (
page A-28.
ADSP-2126x SHARC Processor Hardware Reference
Instruction
rts;
and
JUMP
or a instruction transfers program flow to another
CALL
instruction) onto the PC stack. This push
CALL
subroutine instruction.
RTS
instruction causes the sequencer to fetch the instruction
IMASKP
Program Sequencer
or /
JUMP CALL RETURN
/ instructions, see SHARC
CALL RETURN
JUMP
instruction's matching
CALL
). While the
RTI
pops the return address
RTI
IRPTL
) register. See Table A-9 on
instruction
and a is that
CALL
only pops the
RTS
) and
IRPTL
register and the
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