Analog Devices ADSP-21261 SHARC Hardware Reference Manual page 397

Table 9-5. SPORT Registers (Cont'd)
IOP Register
Address
0x466 TXSP3B
0x467 RXSP3B
0x800 SPCTL4
0x801 SPCTL5
0x802 DIV4
0x803 DIV5
0x804 SPMCTL45
0x805 MT4CS0
0x806 MT4CS1
0x807 MT4CS2
0x808 MT4CS3
0x809 MR5CS0
0x80A MR5CS1
0x80B MR5CS2
0x80C MR5CS3
0x80D MT4CCS0
0x80E MT4CCS1
ADSP-2126x SHARC Processor Hardware Reference
Reset Description
0x0000 0000 SPORT3 Transmit Data Buffer; B channel data
0x0000 0000 SPORT3 Receive Data Buffer; B channel data
0x0000 0000 SPORT4 Serial Control Register
0x0000 0000 SPORT5 Serial Control Register
0x0000 0000 SPORT4 Divisor for Transmit/Receive SPORT4_-
CLK and SPORT4_FS
0x0000 0000 SPORT5 Divisor for Transmit/Receive SPORT4_-
CLK and SPORT5_FS
0x0000 0000 SPORT 4/5 Multichannel Control Register
0x0000 0000 SPORT4 Multichannel Transmit Select 0
(Channel 31–0)
0x0000 0000 SPORT4 Multichannel Transmit Select 1
(Channel 63–32)
0x0000 0000 SPORT4 multichannel transmit select 2
(Channel 95–64)
0x0000 0000 SPORT4 multichannel transmit select 3
(Channel 127–96)
0x0000 0000 SPORT5 Multichannel Receive Select 0
(Channel 31–0)
0x0000 0000 SPORT5 Multichannel Receive Select 1
(Channel 63–32)
0x0000 0000 SPORT5 Multichannel Receive Select 2
(Channel 95–64)
0x0000 0000 SPORT5 Multichannel Receive Select 3
(Channel 127–96)
0x0000 0000 SPORT4 Multichannel Transmit Compand Select 0
(Channel 31–0)
0x0000 0000 SPORT4 Multichannel Transmit Compand Select 1
(Channel 63–32)
Serial Ports
9-47