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The ADSP-2126x has two blocks of RAM that contain up to 1M bit of
memory each, and two blocks of ROM that contain up to 2M bits of
memory each. Each block is physically comprised of four 16-bit columns.
"Wrapping", as shown in
efficiently store 16-bit, 32-bit, 48-bit or 64-bit wide words. The width of
the data word fetched from memory is dependent upon the address range
used. The same physical location in memory can be accessed using three
different addresses.
Accessing a short word memory address accesses one 16-bit word. Consec-
utive 16-bit short-words are accessed from columns #1, #2, #3, #4, #1 and
so on. Accessing a normal word memory address transfers 32 bits (from
columns 1 and 2 or 3 and 4). Consecutive 32-bit words are accessed from
columns 1 and 2, 3 and 4, 1 and 2 etc. Accessing a long word address
transfers 64 bits (from all four columns). For example, the same 16 bits of
Block-0 are overwritten in each of the following four write instructions
(some, but not all of the short word accesses overwrite more than 16 bits).
Listing 5-1. Overwriting Bits (ADSP-21262 Example)
#include <def2126x.h>
DM(0x00040000) = PX;
DM(0x00080000) = R0;
DM(0x00100000) = R0;
NOP
USTAT1 = dm(SYSCTL);
bit set USTAT1 IMDW0;
dm(SYSCTL) = USTAT1;
DM(0x00080000) = R0;
ADSP-2126x SHARC Processor Hardware Reference
Figure 5-8 on page
/* long word transfer
(64 bits/four columns)
/* normal word transfer
(32 bits/two columns)
/* short word transfer
(16 bits/1-column)
/* set Blk0 access as ext. precision
/* normal word transfer
(40 bits/three columns)
5-14, allows the memory to
*/
*/
*/
*/
Memory
*/
5-11
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