Analog Devices ADSP-21261 SHARC Hardware Reference Manual page 268

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Internal Memory Access Listings
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...
...
63-48
PM DATA
BUS
PEX REGISTERS
39-24
23-8
WORD Y0, 63-32
PEY REGISTERS
39-24
23-8
WORD Y0, 63-32
OTHER INSTRUCTIONS WITH SIMILAR DATA FLOWS FOR BROADCAST, LONG WORD, DUAL-DATA TRANSFERS ARE:
DREG = PM(LONG WORD ADDRESS),
Figure 5-30. Long Word Addressing of Dual-Data in Broadcast Load
5-64
ANY BLOCK
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...
...
...
...
...
...
...
...
WORD Y2
WORD Y1
WORD Y0
LONG WORD ACCESS
47-32
31-16
15-0
WORD Y0
RB
7-0
39-24
23-8
0X00
WORD Y0, 31-0
SB
7-0
39-24
23-8
0X00
WORD Y0, 31-0
THIS EXAMPLE SHOWS THE DATA FLOW FOR INSTRUCTION:
RX = DM(LONG WORD X0 ADDRESS), RA = PM(LONG WORD Y0 ADDRESS);
ADSP-2126x SHARC Processor Hardware Reference
MEMORY
ANY OTHER BLOCK
...
...
...
LONG WORD ACCESS
63-48
DM DATA
BUS
RA
7-0
39-24
23-8
0X00
WORD X0, 63-32
SA
7-0
39-24
23-8
0X00
WORD X0, 63-32
DREG = DM(LONG WORD ADDRESS);
...
...
...
...
...
...
...
...
...
WORD X2
WORD X1
WORD X0
47-32
31-16
15-0
WORD X0
RY
7-0
39-24
23-8
0X00
WORD X0, 31-0
SY
7-0
39-24
23-8
0X00
WORD X0, 31-0
RX
7-0
0X00
SX
7-0
0X00

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