Analog Devices ADSP-21261 SHARC Hardware Reference Manual page 808

Neighbor Registers. In Long word addressed accesses, the DSP moves
data to or from two neighboring data registers. The least-significant-32
bits moves to or from the explicit (named) register in the neighbor register
pair. In forced Long word accesses (Normal word address with LW mne-
monic), the DSP converts the Normal word address to Long word, placing
the even Normal word location in the explicit register and the odd Nor-
mal word location in the other register in the neighbor pair.
Parallel port. This port extends the DSPs internal address and data buses
off-chip, providing the processor's interface to off-chip memory devices.
PAGEN, Program address generation logic. "Chapter 3, Program
Sequencer.
Peripherals. This refers to everything outside the processor core. The
ADSP-2126x processor's peripherals include internal memory, parallel
port, I/O processor, JTAG port, and any external devices that connect to
the DSP.
Precision. The precision of a floating-point number depends on the num-
ber of bits after the binary point in the storage format for the number.
The DSP supports two high precision floating-point formats: 32-bit IEEE
single-precision floating-point (which uses 8 bits for the exponent and 24
bits for the mantissa) and a 40-bit extended precision version of the IEEE
format.
Post-modify addressing. The Data Address Generator (DAG) provides an
address during a data move and auto-increments the stored address for the
next move.
Pre-modify addressing. The Data Address Generator (DAG) provides a
modified address during a data move without incrementing the stored
address.
Registers swaps. This special type of register-to-register move instruction
uses the special swap operator, <->. A register-to-register swap occurs
when registers in different processing elements exchange values.
G-8 ADSP-2126x SHARC Processor Core Manual