• Use 3.3 V peripheral components and power supplies to help
reduce transmission line problems, ground bounce and noise cou-
pling (the receiver switching voltage of 1.5 V is close to the middle
of the voltage swing).
• Experiment with the board and isolate crosstalk and noise issues
from reflection issues. This can be done by driving a signal wire
from a pulse generator and studying the reflections while other
components and signals are passive.
Decoupling Capacitors and Ground Planes
Ground planes must be used for the ground and power supplies. Designs
should use a minimum of eight bypass capacitors (six 0.1
0.01
F ceramic). The capacitors should be placed very close to the
and
pins of the package as shown in
VDDINT
traces for this. The ground end of the capacitors should be tied directly to
the ground plane inside the package footprint of the processor (under-
neath, on the bottom of the board), not outside the footprint. A
surface-mount capacitor is recommended because of its lower series induc-
tance. Connect the power plane to the power supply pins directly with
minimum trace length. The ground planes must not be densely perforated
with vias or traces as their effectiveness is reduced. In addition, there
should be several large tantalum capacitors on the board.
Designs can use either bypass placement case shown in
Figure
15-6, or combinations of the two. Designs should try to
minimize signal feedthroughs that perforate the ground plane.
Oscilloscope Probes
When making high speed measurements, be sure to use a "bayonet" type
or similarly short (< 0.5 inch) ground clip, attached to the tip of the oscil-
loscope probe. The probe should be a low capacitance active probe
with 3 pF or less of loading. The use of a standard ground clip with four
ADSP-2126x SHARC Processor Hardware Reference
System Design
F and two
Figure
15-6. Use short and fat
VDDEXT
15-17
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