Flag Value Register (Flags) - Analog Devices ADSP-21261 SHARC Hardware Reference Manual

Table A-13. REVPID Register Bit Descriptions
Bits Name
3–0 PID
7–4 Silicon
Revision

Flag Value Register (FLAGS)

The register is a non-memory-mapped, universal, system register
FLAGS
( and
Ureg Sreg
• bit is
FLG0
• bit is
FLG1
• bit is
FLG2
• bit is
FLG3
• Other
FLGx
• bits are zero
FLGx0
The register indicates the state of the
FLAGS
an output, the processor outputs a high in response to a program setting
the bit in
FLAGS
is controlled by its
definitions are given in

When the flag pins are changed from inputs to outputs, the value
that is driven is the value that had been sampled while the pins
were inputs.
There are 16 flags in ADSP-2126x. All are multiplexed with other pins.
The
FLAG[0:3]
accessible to the Signal Routing Unit (SRU). All 16 flags are routed to the
ADSP-2126x SHARC Processor Hardware Reference
Definition
Processor Identification (Read-only) PID
Silicon Revision
). At reset:
pin value
FLAG0
pin value
FLAG1
pin value
FLAG2
pin value
FLAG3
bit values are unknown
. The I/O direction (input or output) selection of each bit
bit in the
FLGxO
Figure A-11.
pins have four dedicated pins. The
Registers Reference
pins. When a
FLGx
register. The
FLAGS
FLAG[10:15]
pin is
FLGx
register bit
FLAGS
pins are
A-39