Shifter Status Flags - Analog Devices ADSP-21261 SHARC Hardware Reference Manual

39 32
R5
00000000
39 32
R4
10000111
39 32
R3
00000000
Figure 2-14. Bit Field Extract Instruction

Shifter Status Flags

Shifter operations update three status flags in the processing element's
arithmetic status registers (
lists all the bits in these registers. The following bits in
indicate shifter status (a 1 indicates the condition) for the most recent
ALU operation:
• Shifter overflow of bits to left of MSB. Bit 11 (
• Shifter result zero. Bit 12 (
• Shifter input sign for exponent extract only. Bit 13 ()
ADSP-2126x SHARC Processor Hardware Reference
24
00000000 00000010
24
10000000
00000000
16
Starting bit position
for deposit
24
00000000
00000000
16
ASTATx
SZ
Processing Elements
16 8
00010111
bit6
len6
16 8
0000000
8 0
Reference point
16 8
00001111
0
8
and ). Table A-4 on page A-12
ASTATy
)
SS
0
0x0000 0217 00
00000000
len6 = 8
bit6 = 23
0
0x8788 0000 00
00000000
0
0x0000 000F 00
00000000
or
ASTATx ASTATy
)
SV
2-35