• Chain Pointer registers (
hold the starting address of the TCB (parameter register values) for
the next DMA operation on the corresponding channel. These reg-
isters also control whether the I/O processor generates an interrupt
when the current DMA process ends.
• External Index register (
memory address, acting as a pointer to the next external memory
DMA read or write location.
• External Modify registers (
increment by which the DMA controller post-modifies the corre-
sponding external memory index register after the DMA read or
write.
• External Count registers (
the number of words remaining to be transferred to or from exter-
nal memory on the corresponding DMA channel.
Table 7-4. ADSP-2126x Processor DMA Channel Parameter Registers
Register
Function
IIy
Internal Index Register
IMxy
Internal Modify Register
Cxy
Internal Count Register
CPxy
Chain Pointer Register
EIPP
External Index Register
EMPP
External Modify Register
ECPP
External Count Register
1 IDP_DMA_Mx are 6 bits wide only.
ADSP-2126x SHARC Processor Hardware Reference
,
). Chain pointer registers
CPSPx
CPSPI
). Index register provides an external
EIPP
). Modify registers provide the
EMPPx
). External count registers indicate
ECPPx
Width
Description
19 bits
Address of buffer in internal
memory
1
Stride for internal buffer
16 bits
16 bits
Length of internal buffer
20 bits
Chain pointer for DMA
chaining
19 bits
Address of buffer in external
memory
2 bits
Stride for external buffer
16 bits
Length of external buffer
I/O Processor
7-25
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