Changing Spi Configuration - Analog Devices ADSP-21261 SHARC Hardware Reference Manual

SPI Data Transfer Operations

Changing SPI Configuration

Programs should take the following precautions when changing SPI
configurations.
• The SPI configuration must not be changed during a data transfer.
• Change the clock polarity only when no slaves are selected.
• Change the SPI configuration when
operating as a master in a multislave system, and there are slaves
that require different data or clock formats, then the master SPI
should be disabled, reconfigured, and then re-enabled.
However, when an SPI communication link consists of the follow-
ing: 1) a single master and a single slave, 2)
slave's slave select input is tied low, the program can change the
SPI configuration. In this case, the slave is always selected. Data
corruption can be avoided by enabling the slave only after config-
uring both the master and slave devices.
When performing transmit operations with the SPI port, disabling the SPI
port prematurely can cause data to be corrupted and or not fully transmit-
ted. Before the program disables the SPI port in order to reconfigure it,
the status bits should be polled to ensure that all valid data has been com-
pletely transferred. For core-driven transfers, data moves from the
buffer into a shift register. The following bits should be checked before
disabling the SPI port:
1. Wait for the
done when the
2. Wait for the SPI Shift register to finish shifting out data This is
done when the
one.
10-20
buffer to empty into the shift register. This is
TXSPI
bit, (bit 3) of the
TXS
bit, (bit 0) of the
SPIF
ADSP-2126x SHARC Processor Hardware Reference
= 0. For example, if
SPIEN
= 1, and 3) the
CPHASE
register becomes zero.
SPISTAT
register becomes
SPISTAT
TXSPI