Analog Devices ADSP-21261 SHARC Hardware Reference Manual page 396

SPORT Control Registers and Data Buffers
Table 9-5. SPORT Registers (Cont'd)
IOP Register
Address
0x409 MR3CS0
0x40A MR3CS1
0x40B MR3CS2
0x40C MR3CS3
0x40D MT2CCS0
0x40E MT2CCS1
0x40F MT2CCS2
0x410 MT2CCS3
0x411 MR3CCS0
0x412 MR3CCS1
0x413 MR3CCS2
0x414 MR3CCS3
0x460 TXSP2A
0x461 RXSP2A
0x462 TXSP2B
0x463 RXSP2B
0x464 TXSP3A
0x465 RXSP3A
9-46
Reset Description
None SPORT3 Multichannel Receive Select 0
(Channel 31–0)
None SPORT3 Multichannel Receive Select 1
(Channel 63–32)
None SPORT3 Multichannel Receive Select 2
(Channel 95–64)
None SPORT3 Multichannel Receive Select 3
(Channel 127–96)
None SPORT2 Multichannel Transmit Compand Select 0
(Channel 31–0)
None SPORT2 Multichannel Transmit Compand Select 1
(Channel 63–32)
None SPORT2 Multichannel Transmit Compand Select 2
(Channel 95–64)
None SPORT2 Multichannel Transmit Compand Select 3
(Channel 127–96)
None SPORT3 Multichannel Receive Compand Select 0
(Channel 31–0)
None SPORT3 Multichannel Receive Compand Select 1
(Channel 63–32)
None SPORT3 Multichannel Receive Compand Select 2
(Channel 95–64)
None SPORT3 Multichannel Receive Compand Select 3
(Channel 127–96)
None SPORT2 Transmit Data Buffer; A channel data
None SPORT2 Receive Data Buffer; A channel data
None SPORT2 Transmit Data Buffer; B channel data
None SPORT2 Receive Data Buffer; B channel data
None SPORT3 Transmit Data Buffer; A channel data
0x0000 0000 SPORT3 Receive Data Buffer; A channel data
ADSP-2126x SHARC Processor Hardware Reference